數位IC設計工程師 (IC設計工程師)
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依學經歷、證照核薪(每月經常薪資達4萬元以上)
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無工作經驗可
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碩士
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求才人數：1人
1. Have a good command of Verilog / System Verilog / C++ / Perl
2. Have good senses of UVM and Formal verification method.
3. ARM Based SOC verification experience is a plus.
4. Chip Level verification experience is a plus.
5. Well Organized, methodical, and detail oriented.
6. Must be a team player and easy to work with